A Linear Complexity Incremental Defect Mapping Method for Reconfigurable Computing Platforms in the Presence of Prevalent Defects

VLSI systems are subject to increasingly prevalent defects and significant parametric variations as technology scales down into the nanometer domain. Reconfigurable computing platforms provide an excellent foundation to achieve reliable and optimized VLSI systems. Most existing reconfigurable computing platform defect detection and diagnosis methods target single defect occurrence. This paper presents a linear complexity incremental defect mapping method for reconfigurable computing platforms in the presence of prevalent defects, which iteratively increases the number of confirmed defect-free components, and diagnose the rest of the reconfigurable computing platform only based on the confirmed defect-free components. The proposed defect mapping method achieves reliability, efficiency and maximum defect map resolution, providing a basis for adaptive VLSI design in a nanometer technology.